Try new tool: URL Shortener

https://res.cloudinary.com/hg6hswtwo/image/upload/v1/media/pics/autocad-engifree.jpg
lastyear

PLD Architectures and applications MCQ with answers - Part 2





This sets of mcq most focuses on PLD architecture and its applications, Features, Specifications, FPGA Architecture, Features, Specifications with answers...

SET 1 of PLD Architectures and applications MCQ

1. How many number of pins Xilinx CPLD device XC9572 -7 PQ 100 C has ______________
a) 100
b) 07
c) 700
d) 9572

Answer:-a) 100

2. The part number of Xilinx CPLD devices includes the information about _______________
a) Number of Pins
b)Speed
c) Device Type
d) All of the above

Answer:-d) All of the above

3. Which of the following tool performs logic optimization?
a) Simulation tool
b) Synthesis tool
c) Routing tool
d) RTL compile

Answer:-b) Synthesis tool

4. The complex programmable logic device contains several PLD blocks and __________
a) A language compiler
b) AND/OR arrays
c) Global interconnection matrix
d) Field-programmable switches 

Answer:-c) Global interconnection matrix

5. Which of the following are reprogrammable silicon chips?
a) FPGA
b) SROM
c) EPROM
d)All of the above

Answer:-a) FPGA

6. The difference between a PAL & a PLA is ____________
a) PALs and PLAs are the same thing
b) The PLA has a programmable OR plane and a programmable AND plane, while the PAL only has a programmable AND plane
c) The PAL has a programmable OR plane and a programmable AND plane, while the PLA only has a programmable AND plane
d) The PAL has more possible product terms than the PLA

Answer:-b) The PLA has a programmable OR plane and a programmable AND plane, while the PAL only has a programmable AND plane

7. If a PAL has been programmed once ____________
a) Its logic capacity is lost
b) Its outputs are only active HIGH
c) Its outputs are only active LOW
d) It cannot be reprogrammed

Answer:-d) It cannot be reprogrammed

8. The FPGA refers to ____________
a) First programmable Gate Array
b) Field Programmable Gate Array
c) First Program Gate Array
d) Field Program Gate Array

Answer:-b) Field Programmable Gate Array

9. Many companies are transitioning to using FPGA's for their processor designs instead of ASIC's why?
a. FPGAs always outperform an ASIC
b. The development cycle for FPGA is so much shorter
c. FPGAs are more space‐efficient.
d. FPGAs are both smaller and faster.
e. None of the above

Answer:-b. The development cycle for FPGA is so much shorter

10. Which ‘law or rule’ describes the exponential growth of integrated circuit complexity?
a. Nyquist’s theorem
b. Charle’s Law
c. Moore’s Law
d. Faraday’s Law 

Answer:-c. Moore’s Law

11. The cells in the FPGA may contains___________
a. Register’s
b. Look up tables
c. Memory
d. All of the above

Answer:-d. All of the above

12. What implementation method would be appropriate for an application having a complexity equivalent to about 20 standard logic gates?
a. A series of standard CMOS or TTL devices
b. A PLC
c. Simple PLD
d. Complex PLD or FPGA

Answer:-a. A series of standard CMOS or TTL devices

13. ASIC stands for
a. Asynchronous Sequential Integrated Circuits
b. Application Specific Integrated Circuits
c. Algorithm Specific Integrated Circuits
d. None of the above

Answer:-b. Application Specific Integrated Circuits

14. Which of the following statements is incorrect?
a. Some PLDs are programmed using fuses that are selectively blown.
b. Some PLDs are programmed using mechanical switches.
c. Some PLDs are programmed using anti -fuses that are selectively joined.
d. Some PLDs are programmed using electrically operated switches.

Answer:-b. Some PLDs are programmed using mechanical switches.
 





Publish Your Great Work

Your AD here